emda event trigger mode

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emda event trigger mode

Liu Hua
Thanks very much.
Now I can use gpio to trigger once but later it can not work.

Since I can not let CPU respone to the interrupt. I can not use
request_irq(gpio_to_irq()....IRQF_TRIGGER_RISING) to set the GPIO.

1.  I configure the GPIO using the following code:

        /* set GPIO 6 as input */
        gpio_direction_input(6);
        /* set GPIO 6 as rise edge rigger */
        p_gpio = (struct gpio_controller *__iomem)IO_ADDRESS(
                                DAVINCI_GPIO_BASE + 0x10);
        mask = (1 << 6);
        __raw_writel(mask, &p_gpio->clr_falling);
        tmp = mask | __raw_readl(&p_gpio->set_rising);
        __raw_writel(tmp, &p_gpio->set_rising);

       at the same time, The 18 bit of EINT0 is not set. This is an
enable bit of gpio6 interrupt.


2.  I use EMDA  channel 38 to receive the data from FPGA, its trigger
event is GPIO6 interrupt.

        emif_data->dma_ch = DM355_DMA_EMIFRECV;   /* channel 38 */
        ret = davinci_request_dma(emif_data->dma_ch,
                                "EMIF-RECV", emif_callback,
                                emif_data, &edma_chan_num,
                                &tcc, EVENTQ_1);

3.  in the linux_2.6.18_pro500, there's a bitmap variable named
"edma2event_map", which recodes the current edma channels using event
trigger mode. I have already set the corresponding bit of channel 38
in it.   The  bitmap value I have is 0xCD00330Cu, 0x80000040u.

      After I configure the EDMA channel, I call  function
"davinci_start_dma", which will :
                                mask = 1 << (lch - 32);
                                /* Clear any pending error */
                                dma_write(mask, EDMA_EMCRH);
                                /* Clear any SER */
                                dma_write(mask, EDMA_SH_SECRH(0));
                                /* enable the EERH */
                                dma_write(mask, EDMA_SH_EESRH(0));
                                /* clear the ERH */
                                dma_write(mask, EDMA_SH_ECRH(0));


4. When GPIO6 rise edge comes, it triggers the EMDA and generate an
edma interrupt. In the callback funcion "emif_callback", I reclaim the
buffer, and also call these functions:
        /* clear the interrupt status register */
         __raw_writel((1 << 6), &p_gpio->intstat);
        davinci_stop_dma(((struct emif_fh*)data)->dma_ch);
        davinci_clean_channel(((struct emif_fh*)data)->dma_ch);


   Then I reconfigure the EDMA and call davinci_start_dma like the
first time  in this callback function.
   By the way, the "emif_callback" is in interrupt context.


But, now GPIO6 can not trigger the EDMA any more.

Can you help me. Thanks very much in advance.

Best Regards
Richard LIU

2009/11/6  <[hidden email]>:

> Greetings,
>
> Liu Hua Wrote:
>> Now I want to using event trigger mode to reduce the interrupt. ?The
>> GPIO will trigger the EDMA itself without software. The User Guide
>> says "The GPIO interrupt is the trigger event." ? Should I enable the
>> corresponding GPIO interrupt? ?If so, there are two interrupts again.
>> Or I can disable this interrupt. The bit in GPIO interrupt status
>> register is enough to complete the job.
>
> We use a DM6441, but from the docs it looks like a similar setup so:
>
> It sounds from your description that you most of the way there.
>
> What you need to do is enable the EDMA event trapping by setting
> the "event enable set register EESR/EESRH". Since you'll need to
> know when it is done, also enable the EDMA interrupt for the
> GPIO channel in "interrupt enable register IER".
>
> This means that when the GPIO interrupt status is asserted,
> the EDMA will fire off as long the PaRam set that channel is
> associated with is valid. After it completes it will trigger
> the EDMA completion interrupt (which I think you already handle).
>
> Just remember to clear the interrupt flags in the EDMA interrupt
> pending register (IPR) or you will miss events.
>
>> How could I let GPIO trigger the EDMA and at the same time,
>> DM355 not respone to the interurupt ?
>
> You can disable the GPIO interrupt handler and enable the EDMA
> interrupt (16 on DM355 I believe). The EDMA controller doesn't
> care whether you are actually handling the interrupt that triggered
> the event or not.
>
> When you get the EDMA interrupt, check for the TC code as you do
> now and all should be well.
>
> Please see the EDMA doc for more info at:
> http://focus.ti.com/lit/ug/spruee4a/spruee4a.pdf
>
> Hope that helps,
> David
>
> --
> DAVID A. KONDRAD
> Software Design Engineer
> Legrand Home Systems Division
>
> http://www.legrand.us/onq
>
> This email, and any document attached hereto, may contain
> confidential and/or privileged information. ?If you are not the
> intended recipient (or have received this email in error) please
> notify the sender immediately and destroy this email. ?Any
> unauthorized, direct or indirect, copying, disclosure, distribution
> or other use of the material or parts thereof is strictly
> forbidden.
>

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emda event trigger mode

Richard Williams
Liu Hua,

I think the information at:
<http://wiki.davincidsp.com/index.php?title=Configuring_GPIO_Interrupts>
(which also contains info on how to recover from an interrupt)
has the details about what you need to know.

R. Williams

---------- Original Message -----------
From: Liu Hua <[hidden email]>
To: [hidden email]
Cc: [hidden email]
Sent: Sat, 7 Nov 2009 01:37:39 +0800
Subject: Re: emda event trigger mode

> Thanks very much.
> Now I can use gpio to trigger once but later it can not work.
>
> Since I can not let CPU respone to the interrupt. I can not use
> request_irq(gpio_to_irq()....IRQF_TRIGGER_RISING) to set the GPIO.
>
> 1. ?I configure the GPIO using the following code:
>
> ? ? ? ?/* set GPIO 6 as input */
> ? ? ? ?gpio_direction_input(6);
> ? ? ? ?/* set GPIO 6 as rise edge rigger */
> ? ? ? ?p_gpio = (struct gpio_controller *__iomem)IO_ADDRESS(
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?DAVINCI_GPIO_BASE + 0x10);
> ? ? ? ?mask = (1 << 6);
> ? ? ? ?__raw_writel(mask, &p_gpio->clr_falling);
> ? ? ? ?tmp = mask | __raw_readl(&p_gpio->set_rising);
> ? ? ? ?__raw_writel(tmp, &p_gpio->set_rising);
>
> ? ? ? at the same time, The 18 bit of EINT0 is not set. This is an
> enable bit of gpio6 interrupt.
>
> 2. ?I use EMDA ?channel 38 to receive the data from FPGA, its trigger
> event is GPIO6 interrupt.
>
> ? ? ? ?emif_data->dma_ch = DM355_DMA_EMIFRECV; ? /* channel 38 */
> ? ? ? ?ret = davinci_request_dma(emif_data->dma_ch,
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?"EMIF-RECV", emif_callback,
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?emif_data, &edma_chan_num,
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?&tcc, EVENTQ_1);
>
> 3. ?in the linux_2.6.18_pro500, there's a bitmap variable named
> "edma2event_map", which recodes the current edma channels using event
> trigger mode. I have already set the corresponding bit of channel 38
> in it. ? The ?bitmap value I have is 0xCD00330Cu, 0x80000040u.
>
> ? ? ?After I configure the EDMA channel, I call ?function
> "davinci_start_dma", which will :
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?mask = 1 << (lch - 32);
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?/* Clear any pending error */
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?dma_write(mask, EDMA_EMCRH);
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?/* Clear any SER */
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?dma_write(mask, EDMA_SH_SECRH(0));
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?/* enable the EERH */
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?dma_write(mask, EDMA_SH_EESRH(0));
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?/* clear the ERH */
> ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ?dma_write(mask, EDMA_SH_ECRH(0));
>
> 4. When GPIO6 rise edge comes, it triggers the EMDA and generate an
> edma interrupt. In the callback funcion "emif_callback", I reclaim the
> buffer, and also call these functions:
> ????/* clear the interrupt status register */
> ???? __raw_writel((1 << 6), &p_gpio->intstat);
> ????davinci_stop_dma(((struct emif_fh*)data)->dma_ch);
> ????davinci_clean_channel(((struct emif_fh*)data)->dma_ch);
>
> ? Then I reconfigure the EDMA and call davinci_start_dma like the
> first time ?in this callback function.
> ? By the way, the "emif_callback" is in interrupt context.
>
> But, now GPIO6 can not trigger the EDMA any more.
>
> Can you help me. Thanks very much in advance.
>
> Best Regards
> Richard LIU
>
> 2009/11/6 ?<[hidden email]>:
> > Greetings,
> >
> > Liu Hua Wrote:
> >> Now I want to using event trigger mode to reduce the interrupt. ?The
> >> GPIO will trigger the EDMA itself without software. The User Guide
> >> says "The GPIO interrupt is the trigger event." ? Should I enable the
> >> corresponding GPIO interrupt? ?If so, there are two interrupts again.
> >> Or I can disable this interrupt. The bit in GPIO interrupt status
> >> register is enough to complete the job.
> >
> > We use a DM6441, but from the docs it looks like a similar setup so:
> >
> > It sounds from your description that you most of the way there.
> >
> > What you need to do is enable the EDMA event trapping by setting
> > the "event enable set register EESR/EESRH". Since you'll need to
> > know when it is done, also enable the EDMA interrupt for the
> > GPIO channel in "interrupt enable register IER".
> >
> > This means that when the GPIO interrupt status is asserted,
> > the EDMA will fire off as long the PaRam set that channel is
> > associated with is valid. After it completes it will trigger
> > the EDMA completion interrupt (which I think you already handle).
> >
> > Just remember to clear the interrupt flags in the EDMA interrupt
> > pending register (IPR) or you will miss events.
> >
> >> How could I let GPIO trigger the EDMA and at the same time,
> >> DM355 not respone to the interurupt ?
> >
> > You can disable the GPIO interrupt handler and enable the EDMA
> > interrupt (16 on DM355 I believe). The EDMA controller doesn't
> > care whether you are actually handling the interrupt that triggered
> > the event or not.
> >
> > When you get the EDMA interrupt, check for the TC code as you do
> > now and all should be well.
> >
> > Please see the EDMA doc for more info at:
> > http://focus.ti.com/lit/ug/spruee4a/spruee4a.pdf 
> >
> > Hope that helps,
> > David
> >
> > --
> > DAVID A. KONDRAD
> > Software Design Engineer
> > Legrand Home Systems Division
> >
> > http://www.legrand.us/onq 
> >
> > This email, and any document attached hereto, may contain
> > confidential and/or privileged information. ?If you are not the
> > intended recipient (or have received this email in error) please
> > notify the sender immediately and destroy this email. ?Any
> > unauthorized, direct or indirect, copying, disclosure, distribution
> > or other use of the material or parts thereof is strictly
> > forbidden.
> >
>
> _______________________________________________
> Davinci-linux-open-source mailing list
> [hidden email]
> http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source 
------- End of Original Message -------
 
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